Technical note reporting the hardware realization of argmax-snapped EML expression trees on Lattice iCE40 FPGAs. On fabric without DSP inference, snapped symbolic primitives (exp and ln) are simultaneously smaller and more accurate than every quantized MLP in a width/depth sweep, are bit-exact to the true function (confirmed 256/256 on a physical iCEstick), and against a direct ROM remain realizable where tabulation fails. Includes a 2-input arity experiment showing additive vs multiplicative scaling. Companion to "Valid and False Snapping in EML Expression Trees: The Basin Selection Problem" (v2.3, DOI 10.5281/zenodo.20671038).
symbolic regression · EML expression trees · FPGA · iCE40 · fixed-point arithmetic · verifiable hardware · edge inference · lookup table · compression · DSP-less